In electronic design, there is a recurring need for variable length delay circuits whose delay value is programmable during circuit operation.
U.S. Pat. No. 4,016,511 to Ramsey et al. for a "Programmable Variable Length High Speed Digital Delay Line", hereby incorporated by reference, discloses a delay line apparatus that utilizes a set of progressively increasing delay stages in conjunction with a set of digitally selectable switching units. The progressively increasing delay element stages have delay times that are related as powers of two, i.e., 1, 2, 4, . . . , 2.sup.N-2, 2.sup.N-1. These N delay element stages are arranged in series, connected by N switches that allow the input of any element to be connected to the output of any preceding element or the input to the overall delay line. Each switch must have as many positions as the number of delay element stages in front of it plus one. Thus, for N delay element stages, N switches are required, with those switches having 2, 3, . . .. N, N+1 inputs, respectively. While these switches permit any combination of delay elements to be connected in series, to control them an N-bit delay length word must be decoded into numerous control lines in order to appropriately control each of the multi-input switches.
It would be highly desirable to have a programmable variable delay element with a simplified structure that both conserves parts and provides for simplified programmability.